The Ninth IEEE Workshop on RTL and High Level Testing
Nov. 27-28, 2008@ACU (Advanced Center for Universities), Sapporo, Japan

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Sponsored by
@IEEE Computer Society Test Technology Technical Council
@IEICE-ISS, Technical Committee on Dependable Computingn

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Supported by
@Support Center for Advanced Telecommunications Technology  Research, Foundation (SCAT)
@Sapporo International Communication Plaza Foundation


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@Advance Program
ΛKeynote Speech
(Dr.ErikLarsson;PDF)

ΛInvited Talk
(Dr.Patrick Girard;PDF)
Scope
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Key Dates
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Call For Papers
Call For Participation
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ΛATS'08
Last Update
Dec 3, 2008
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@ @Scope
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The purpose of this workshop is to bring researchers and practitioners on LSI testing from all over the world together to exchange ideas and experiences on register transfer level (RTL) and high level testing. WRTLT'08, the ninth workshop, will be held in conjunction with the 17th Asian Test Symposium (ATS'08) in Sapporo, Japan. Areas of interest include but are not limited to:
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(1) High level testing -- RTL/Behavior level testing, High level approaches for testing, RTL ATPG, RTL DFT, RTL BIST, Synthesis for testability, Relationship between RTL and gate level testing, Functional fault modeling, High level test bench generation
(2) SoC testing -- Test scheduling, Core testing, Interconnect testing, NoC testing
(3) Reliable SoC -- System level reliability, Self repair, Fault tolerant SoCc
(4) Micro processor testing
(5) Design Verification
(6) Gate level test related issues -- Low power testing, Test compression, ATPG, DFT, BIST
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This year we will set up the theme of "Power/Thermal-Aware Testing", which we believe needs to be discussed not only at gate level but also from high level in this workshop. Paper submissions related to this theme are especially welcomed. Panel discussion and a special session on this theme are being planned.
We hope and expect this workshop provides an ideal forum for frank discussion on this important topic for the future system-on-a-chip (SoC) devices.
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@@Submissions
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Authors are invited to submit paper proposals for presentation at the workshop. The proposal may be an extended summary (1,000 words) or a full paper, and should include: the title of the paper, full name and affiliation of all authors, 50-words abstract, keywords, and the name of contact author. All submissions should be sent to the following email address as a Postscript or PDF attachment.
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wrtlt08submission@ip.elec.mie-u.ac.jp
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The submission will be considered evidence that upon acceptance the author(s) will prepare the final manuscript in time for inclusion in the digests and will present the paper at the workshop.
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@ @Key Dates
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Submission deadline: August 4, 2008
Notification of acceptance: September 11, 2008
Camera ready copy: October 5, 2008
Advance Registration: October 24, 2008
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@@Further Infomation
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Mail : wrtlt08@aries30.cse.kyutech.ac.jp
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