ATS'12




The 21st Asian Test Symposium
November 19-22, 2012,Toki Messe Niigata Convention Center, Niigata, Japan

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IEEE Computer Society Test Technology Technical Council

Kyushu Institute of Technology

In cooperation with
The IEICE Information and Systems Society Technical Committee on Dependable Computing

Japan Science and Technology Agency

Scopes
The Asian Test Symposium (ATS) provides an international forum for engineers and researchers from all countries of the world, especially from Asia, to present and discuss various aspects of device, board and system testing with design, manufacturing and field considerations in mind.


Major topics include, but are not limited to:

  • Automatic Test Pattern Generation (ATPG)
  • Analog Test / Mixed-Signal Test
  • Boundary Scan Test
  • Board and System Test
  • Built-In Self-Test
  • Design for Testability (DFT)
  • Design Verification and Validation
  • Defect-Based Testing
  • Delay and Performance Test
  • Diagnosis and Debug
  • Dependable System
  • Economics of Test

  • Fault Modeling and Simulation
  • Fault Tolerance
  • High-Speed I/O Test / RF Testing
  • Memory Test / FPGA Test
  • On-Line Test
  • System-on-a-Chip Test
  • System-in-package (SiP)/ 3D Test
  • Software Testing / Software Design for Testing
  • Test Compression
  • Temperature/Power-aware Test
  • Test Quality
  • Yield Analysis and Enhancement


Submissions

Regular Session:
The ATS'12 Program Committee invites original, unpublished paper submissions for ATS'12. Paper submissions should be complete manuscripts, up to six pages (including figures, tables, and bibliography) in a standard IEEE two-column format; papers exceeding the page limit will be returned without review. (For more details...)


Key Dates (Regular Session)
Submission deadline: May 25, 2012 --> June 10th, 2012 --> June 15th, 2012
Notification of acceptance: Aug. 5, 2012
Camera ready copy: Aug. 31, 2012


Industry Session:
This session will address a wide range of practical problems in LSI test, board and system test, diagnosis, failure analysis, design verification, and so on. The session will consist of poster presentations and optional oral presentations. A one-page abstract is required for submission. (For more details...)

Key Dates (Industry Session)
Submission deadline:
Jul. 5, 2012 --> Jul. 19th, 2012
Notification of acceptance: Aug. 5, 2012
Camera ready copy: Aug. 31, 2012


Doctoral Thesis Award:
The Award serves the purpose to promote most impactful doctoral student work, to provide the students with the exposure to the community and the prospective employers, and to support interaction between academia and industry in the field of test technology. This major Award is named after Prof. Edward J. McCluskey, a key educator and mentor in the fields of test technology, logic design, and reliability. CFP(pdf)

Key Dates (Doctoral Thesis Award)
Submission deadline:
Sep. 5th, 2012
Notification of acceptance: Sep. 20, 2012




More Information

For general information
General Chair: Kazumi Hatayama (ats12-gc@aries30.cse.kyutech.ac.jp)

For submission related information
Program Chair: Hiroshi Takahashi (ats12-pc@aries30.cse.kyutech.ac.jp)