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Honors

  • Fellow
    Institute of Electrical and Electronics Engineers (IEEE) (2012.1.1)
    for contributions to testing of integrated circuits
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  • Best Paper Award
    Institute of Electronics, Information and Communication Engineers (IEICE) /
    Information and Systems Society (2009.11.26)
    for papers on low-capture-power test generation for VLSIs
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  • Best Paper Award
    25th IEEE Asian Test Symosium (2016.11.22)
    "Logic/Clock-Path-Aware At-Speed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch"
  • Best Paper Award
    7th IEEE Workshop on RTL and High Level Testing (2007.10.12)
    "An Improved Method of Per-Test X-fault Diagnosis for Deep-Submicron LSI Cricuits"
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  • Research Achievement Award
    Information Processing Society of Japan / Northeastern Section (1994.5.11)
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