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T
hank you very much for coming to my homepage, specially designed to provid you with comprehensive information about my research and education activities.

In research, I am striving to develop innovative solutions to test generation, design for test, fault diagnosis, and reliability enhancement for VLSI circuits. My research goal is to make test a value-adding means, rather than a cost factor, for the semiconductor industry. In education, I am striving to arm my students with not only abundant technical knowledge but also strong problem-solving capability, creativity, team spirit, as well as excellent presentation and communication skills. My education goal is to help my students to thrive, not just survive, in highly competitive and global professional environments.

P
lease start your surfing through my homepage now. For a quick glimpse of me, you may also visit LinkedIn at https://www.linkedin.com/in/xiaoqing-wen-27109915. If you have any questions, comments, or just want to say hello, please do not hesitate to do so by dropping me an email at wen@cse.kyutech.ac.jp. There is no greater pleasure than hearing from friends like you.


Enjoy!



Professor
Department of Computer Science and Networks
Faculty of Computer Science and Systems Engineering
Kyushu Institute of Technology
Kawazu 680-4, Iizuka, Fukuoka 820-8502, Japan

* (1) Frequently Requested Papers VTS05/VTS11/ETS12/ITC12/ATS15/ETS18 (2) irL (3) Љ (4) Wen-Lab-Designed Chip for Test Power Evaluation (with Patented Delay Measurement Circuitry)